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Designing a CMOS Quantum Chip

conceptual view of cmos quantum chip

Artist’s impression of the architecture of a silicon CMOS chip for a spin-based quantum computer. The top side has mostly standard CMOS components, with the quantum bits in operation below. [Image: Tony Melov/UNSW]

Theoretical studies of quantum computing must eventually lead to workable devices. A research team based in Australia has proposed a design for a quantum computer with a silicon-based architecture compatible with standard microprocessor manufacturing technology (Nature Comms., doi:10.1038/s41467-017-01905-6).

Connecting the (quantum) dots

The group, led by Andrew Dzurak and Menno Veldhorst of the University of New South Wales (UNSW), built its plans on pioneering spin-based quantum-computing concepts developed at that institution nearly two decades ago. The current research, however, connects commercially available silicon-on-insulator (SOI) technology with quantum bits, or qubits, defined by single electron spin states confined in quantum dots.

According to the authors, practical schemes for universal quantum computing require error-correcting codes to manage the mistakes that fragile qubits occasionally make. In turn, such codes need sizable numbers of qubits, perhaps 100 million, to work properly. Obviously, technologies to handle millions and billions of bits of information in a small physical space—CMOS manufacturing processes—are already well established.

Four-layer sandwich

The UNSW engineers start their plans with a four-layer semiconductor sandwich. From the top down, they propose an input layer of silicon dioxide, a transistor layer of silicon, an interconnect layer of silicon dioxide and a qubit layer of silicon enriched with the common 28Si isotope. After CMOS processing, the two top layers consist of conventional transistor and connection circuitry, while the bottom layer holds the qubits, or Q-gates, in an array of control structures known as J-gates. Tiny vias, or interconnects, join the qubits to the transistors.

Dzurak's team laid out the schematic for a 480-qubit processor, with the design simply replicated for larger arrays. The researchers envision that the module would operate at cryogenic temperatures (1 K or lower) and that a phenomenon called Pauli-spin blockade would control the readout of the silicon spin qubits.

Further advances required

While current fabrication technologies can make single transistors at the scale of a quantum dot, the UNSW team cautions that ongoing advances in semiconductor technology must continue in order to connect multiple transistors with qubits.

Since this research was completed, Veldhorst has joined a quantum technology laboratory in his native Netherlands. Meanwhile, the remainder of the UNSW team has partnered with Australian telecommunications, banking and government entities in a quest to build a working prototype of a 10-qubit quantum integrated circuit by 2022.

Publish Date: 27 December 2017

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